1. Field of the Invention
The present invention relates to a solid-state image sensing device and solid-state image sensing device array and, more particularly, to an X-Y address type solid-state image sensing element of sequentially reading out signals from respective photoelectric converters on the basis of vertical and horizontal scanning signals.
2. Related Background Art
As the image processing speed increases with the recent advance of information processing apparatuses, the need arises for a larger light-receiving area of an image sensor. To meet this need, a light-receiving element itself may be made large by combining amorphous Si and TFTs. However, considering image lag, the light-receiving area is practically increased by arraying a plurality of X-Y address type solid-state image sensing devices such as MOS image sensors.
The X-Y address type solid-state image sensing device has a light-receiving portion constituted by forming a plurality of photoelectric converters into an Mxc3x97N array (M and N are natural numbers). A vertical shift register for designating a row having a photoelectric converter from which charges are to be read out is formed on one side of the light-receiving portion. A horizontal shift register for designating a column having a photoelectric converter from which charges are to be read out is formed on a side adjacent to the side on which the vertical shift register is formed. When the light-receiving area is increased by arraying a plurality of solid-state image sensing devices, they can be arrayed up to 2xc3x972=4 without any dead zone (i.e., they can be surrounded by the vertical and horizontal shift registers). To array a larger number of devices, the vertical and horizontal shift registers act as a dead zone.
An example of solid-state image sensing devices capable of eliminating such dead zone and arraying a plurality of solid-state image sensing devices to increase the light-receiving area is a solid-state image sensing device disclosed in Japanese Patent Laid-Open No. 9-326479. In this solid-state image sensing device, vertical and horizontal shift registers are formed on a surface different from the surface on which a light-receiving portion is formed (more specifically, a surface perpendicular to the surface on which the light-receiving portion is formed). Even if a plurality of solid-state image sensing devices are arrayed, generation of a dead zone by the vertical and horizontal shift registers can be prevented.
Using this solid-state image sensing device, a plurality of solid-state image sensing devices can be arrayed without any dead zone. However, in this solid-state image sensing device, the vertical and horizontal shift registers are formed on a surface different from the surface on which the light-receiving portion is formed. Thus, solid-state image sensing devices are difficult to manufacture and array.
It is, therefore, an object of the present invention to provide a solid-state image sensing device capable of easily arraying a plurality of devices without any dead zone, and increasing the light-receiving area.
To achieve the above object, a solid-state image sensing device according to the present invention is characterized by comprising a light-receiving portion having a plurality of photoelectric converters arrayed in M rows and N columns on a substrate, first wiring lines formed in units of columns, a first switch group including a plurality of switches for connecting the photoelectric converters to the first wiring lines in units of columns, a vertical shift register for outputting a vertical scanning signal for opening/closing the switches forming the first switch group in units of rows, second wiring lines for connecting control terminals of the switches forming the first switch group to the vertical shift register in units of rows, a second switch group including a plurality of switches for connecting the first wiring lines to a signal output line, and a horizontal shift register for outputting a horizontal scanning signal for opening/closing the switches forming the second switch group in units of columns, wherein the vertical and horizontal shift registers are arranged on two facing sides or a predetermined side of the light-receiving portion, and the second wiring lines have compensation portions for making capacitances of the second wiring lines almost equal in units of rows.
Since the vertical and horizontal shift registers are formed on two facing sides or a predetermined side of the light-receiving portion, the solid-state image sensing device can be easily formed, and a plurality of devices can be easily arrayed, compared to a case in which vertical and horizontal shift registers are formed on a surface different from the surface on which the light-receiving portion is formed.
When the vertical and horizontal shift registers are respectively formed on two facing sides of the light-receiving portion, any number of solid-state image sensing devices can be arrayed without any dead zone, on the remaining two sides on which no vertical and horizontal shift registers are formed. When both the vertical and horizontal shift registers are formed on a predetermined side of the light-receiving portion, any number of solid-state image sensing devices can be arrayed without any dead zone, on two sides adjacent to the side on which the vertical and horizontal shift registers are formed. In addition, solid-state image sensing devices can be arrayed without any dead zone, on a side facing the side on which the vertical and horizontal shift registers are formed.
These solid-state image sensing devices can be formed into a solid-state image sensing device array in which the devices are arrayed on the above-mentioned sides without any dead zone.
Further, the second wiring lines have the compensation portions for making the capacitances of the second wiring lines almost equal in units of rows. The compensation portions can compensate for the difference between capacitances caused by the difference between the lengths of the second wiring lines in units of rows, and can make the capacitances of the second wiring lines in units of rows almost equal.